So, the previous post was a bit light on explanation. That's because it wasn't quite working properly, although I've had a chance to fix it up and now it's a lot better, so I've just updated the picture. So, what does it represent?
Perhaps the best explanation is by way of a quick demo:
Basically, makes CPC FPGA the easiest CPC hardware to use on an LCD TV. Normally, smooth horizontal scrolling looks awful on an LCD because the monitor reacts to the signal differently on an LCD to a CRT. Essentially this is because the PLL is tuned to the higher frequencies that monitors are usually used at and so they react to a moving horizontal sync pulse more rapidly.
Moving the sync pulse is a pretty bad thing to do as it's technically a non-conformant video signal - it's just that it works fine with the CPC monitor... and now with the CPC FPGA it works fine on an LCD TV too! :)
